1. Field of the Invention
The present invention relates to a packet processing apparatus and method in a packet switch system, and more particularly, to a packet processing apparatus and method using a network processor or a packet processor.
The present invention was supported by the IT R&D program of MIC/IITA[2006-S-061-02, R&D on Router Technology for IPv6 based QoS Services and Host Mobility].
2. Description of the Related Art
Due to rapid increase in amount of data traffic according to popularization of the Internet and due to advent of new types of services according to integration of wire and wireless Internets, conventional network apparatuses have problems in terms of processing capacity and performance. In order to solve the problems, network processors have been proposed. However, in network apparatuses using such network processors, all packet processing functions are allocated to only the network processors. Since functions for supporting various types of multimedia services and applications are loaded on the network processors, there is a problem of deterioration in performance of the network processors. In order to solve the problems, some of conventional packet processors, buffers corresponding to packet types are disposed in front of the network processors, or engines for the network processors are variably used so as to increase use efficiency thereof.
As an example of the general packet processing apparatus, an IP packet processing apparatus using a network processor will be described with reference to FIG. 1.
As shown in FIG. 1, the IP packet processing apparatus using a network processor includes 8 micro engines 11 to 18 of the network processor. The micro engines 11 to 18 includes a packet receiver (Packet_Rx) 11, a packet classifier (Ethernet_Decap/Classify) 12, an IPv4 packet/IPv6 packet forwarder (IPv6_Unicast/Multicast Forwarder) 13, a packet queue manager 14, a packet scheduler 15, a multicast packet copier 16, and a packet transmitter (Packet_Tx/Ethernet_Encap) 17.
As another example of the general packet processing apparatuses, there is a packet processing apparatus shown in FIG. 2. The packet processing apparatus is used for a point-to-point protocol (hereinafter, referred to as PPP) header. The packet processing apparatus includes a protocol field lookup unit 21, a buffer manager 22, buffers 23 to 24 required for data transmission, and IPv4 and IPv6 packet processors 25 and 26 in the network processor. In this case, the two buffers, that is, the buffer_1 23 for storing an IPv4 packet and the buffer_2 24 for storing an IPv6 packet are used. That is, the buffer_1 23 is a buffer for storing the IPv4 packet, and the buffer_2 24 is a buffer for storing the IPv6 packet.
In addition, as still another example of the general packet processing apparatus, there is a PPP data frame processing apparatus shown in FIG. 3. The PPP data frame processing apparatus 30 includes a fabric interface 31 for data exchange with an external switch board, first and second PPP data analysis modules 32 and 33 for analyzing a PPP data frame received through the fabric interface 31, and a host 34 for controlling a sub-control of the PPP data frame. The first PPP data analysis module 32 includes a first processor for analyzing a PPP data and recovering a data according to the sub-control included in the PPP data and a second processor for removing a header of the PPP data. The second PPP data analysis module 33 includes a third processor for inserting a header into an IP data and a fourth processor for converting the IP data into a PPP data format.
Functions and operations of the packet processing apparatuses are well known to the ordinarily skilled in the related art, and thus, detailed description thereof is omitted. Basic headers of the IPv4 packet and the IPv6 packet processed by the conventional packet processing apparatus are headers of IPv4 and IPv6 standard protocols. The structures of the basic header field format s are shown in FIGS. 4 and 5. Since a structure of the basic header field format are well known to the ordinarily skilled in the art, detailed description thereof is omitted.
The conventional packet processing apparatuses shown in FIGS. 1 to 3 has problems as follows.
In the IP packet processing apparatus using the network processor shown in FIG. 1, micro engines of the network processors are not fixed allocated, but micro engines having variable functions are used so as to dynamically allocate resources according to packet types of the received packets and packet amounts thereof, so that the network processors can be effectively used for processing packets. However, since the entire packet processing functions are still allocated to the network processors, as the number of supported protocols are increased, there is a problem of a deterioration in performance of the network processors.
In the packet processing apparatus shown in FIG. 2, packets classified according to types of protocols are buffered, so that the packets classified according to the types of protocol can be independently processed by the network processors. Accordingly, processing operations corresponding to non-supported protocols can be omitted, so that it is possible to prevent a waste of resources. In addition, in the packet processing apparatus, a buffer manager can dynamically adjust buffer sizes allocated to network protocols, so that efficient communication can be implemented according to packet amounts of received packets and a change in packet amounts. However, in the packet processing apparatus, the buffer management is performed by using simple protocol lookup, but actual packet processing is not performed. Therefore, packet processing amount of the network processor is not changed. In particular, when various types of protocols such as routing protocol or multi-protocol label switching (MPLS) are loaded on the network processor of the packet processing apparatus, the performance of the actual system is deteriorated.
In the PPP data frame processing apparatus shown in FIG. 3, network processors including a plurality of processors capable of processing data frames as well as different functions thereof are used to generate and analyze PPP data frames in a hardware manner, so that a large amount of PPP data can be processed at a high rate. However, the PPP data frame processing apparatus has a problem in that the PPP data frame processing apparatus can not completely process packets having Ethernet frames that generally occupy more than 80% of the entire network frames. In order to solve the problem, additional processors having functions of processing the Ethernet packets are needed. Since the functions of processing the Ethernet packets are added, the PPP data frame processing apparatus increases a burden to the actual network processors, so that the performance of the system is deteriorated.
Recently, a large number of IPv6 applications newly appear, and a line speed required for an increase in traffics is rapidly increased. In addition, gigabyte switches are mainly used, and further more, switches using 10-gigabyte uplink ports are also proposed. Accordingly, the performance of the system supporting various types of applications becomes one of the very impotent factors.